Design Verification Engineer

• Understand the requirements & the functional description of the device to ensure compliance with specifications and error-free functionality.
• Develop a digital circuit with System Verilog/Verilog for a new design or update the functions of an existing design of the circuit.
• Create a detailed block design using System Verilog/Verilog from functional requirement, evolve design specification and perform RTL coding, Lint checking.
• Create and execute a verification plan, including verification testbench/patterns/models/System Verilog Assertions (SVAs).
• Develop SVA properties for assertion, assumption and cover statement.
• Debug failures, fix testbench/model/checker issues, analyze and close coverage.
• Write scripts for automation of flow.
• Work with Analog team members to bring-up Chip/System level verification.
• Participate in post-silicon bring-up, validation and compliance testing.

Competitive salary and bonus
,#Social insurance, health insurance, unemployment insurance according to Labor Laws
,#Good chance to study and develop career path stably

Verilog Design, Digital Circuit Design, Linux, Python, Test Script